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Virtual Testing Environment for A/D Converters in Verilog-A and Maple Platform.

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    Title: Virtual Testing Environment for A/D Converters in Verilog-A and Maple Platform.
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    Date: 2008
    Publication type: Conference paper
    Authors:
    No. First name Last name Show
    1. Ondrej Subrt
    2. Petr Struhovský
    3. Pravoslav Martínek
    4. Jirí Hospodka
    Download (by DOI): 10.1109/DDECS.2008.4538803
    BibTeX: conf/ddecs/SubrtSMH08
    DBLP: db/conf/ddecs/ddecs2008.html#SubrtSMH08
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    Name: Proceedings of the 11th IEEE Workshop on Design Diagnostics of Electronic Circuits Systems (DDECS 2008), Bratislava, Slovakia, April 16-18, 2008 2008
    DBLP: db/conf/ddecs/ddecs2008.html