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High speed multistage CMOS clock buffers with pulse width control loop.

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    Title: High speed multistage CMOS clock buffers with pulse width control loop.
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    Date: 1999
    Publication type: Conference paper
    Authors:
    No. First name Last name Show
    1. Fenghao Mu
    2. Christer Svensson
    Download (by DOI): 10.1109/ISCAS.1999.780805
    BibTeX: conf/iscas/MuS99a
    DBLP: db/conf/iscas/iscas1999-2.html#MuS99a
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    Conference
    Name: International Symposium on Circuits and Systems (ISCAS 1999), May 30 - June 2, 1999, Orlando, Florida, USA 1999
    DBLP: db/conf/iscas/index.html#1999