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Functional verification of intellectual properties (IP): a simulation-based solution for an application-specific instruction-set processor.

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    Publication properties
    Title: Functional verification of intellectual properties (IP): a simulation-based solution for an application-specific instruction-set processor.
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    Date: 1999
    Publication type: Conference paper
    Authors:
    No. First name Last name Show
    1. Manfred Stadler
    2. Thomas Röwer
    3. Hubert Kaeslin
    4. Norbert Felber
    5. Wolfgang Fichtner
    6. Markus Thalmann
    BibTeX: conf/itc/StadlerRKFFT99
    DBLP: db/conf/itc/itc1999.html#StadlerRKFFT99
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    Conference
    Name: Proceedings IEEE International Test Conference 1999, Atlantic City, NJ, USA, 27-30 September 1999 1999
    DBLP: db/conf/itc/itc1999.html