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Current demand balancing: a technique for minimization of current surge in high performance clock-gated microprocessors.

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    Publication properties
    Title: Current demand balancing: a technique for minimization of current surge in high performance clock-gated microprocessors.
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    Date: 2005
    Publication type: Conference paper
    Authors:
    No. First name Last name Show
    1. Yiran Chen
    2. Kaushik Roy
    3. Cheng-Kok Koh
    Download (by DOI): 10.1109/TVLSI.2004.840404
    BibTeX: journals/tvlsi/ChenRK05
    DBLP: db/journals/tvlsi/tvlsi13.html#ChenRK05
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    Journal
    Name: IEEE Trans. VLSI Syst.
    Year: 2005
    Volume: 13
    Number: 8
    DBLP: db/journals/tvlsi/tvlsi13.html