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First name:	Yasuhiro
Last name:	Morita
DBLP:	04/2645
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	Hidehiro Fujiwara, Shunsuke Okumura, Yusuke Iguchi, Hiroki Noguchi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yoshimoto. Quality of a Bit (QoB): A New Concept in Dependable SRAM.	9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA 2008	(0)	2008
	Hiroki Noguchi, Yusuke Iguchi, Hidehiro Fujiwara, Shunsuke Okumura, Yasuhiro Morita, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto. A 10T Non-precharge Two-Port SRAM Reducing Readout Power for Video Processing.	IEICE Transactions 2008, Volume 91	(0)	2008
	Hidehiro Fujiwara, Koji Nii, Hiroki Noguchi, Junichi Miyakoshi, Yuichiro Murachi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yoshimoto. Novel Video Memory Reduces 45% of Bitline Power Using Majority Logic and Data-Bit Reordering.	IEEE Trans. VLSI Syst. 2008, Volume 16	(0)	2008
	Hiroki Noguchi, Yusuke Iguchi, Hidehiro Fujiwara, Yasuhiro Morita, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto. A 10T Non-Precharge Two-Port SRAM for 74% Power Reduction in Video Processing.	2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), May 9-11, 2007, Porto Alegre, Brazil 2007	(0)	2007
	Yasuhiro Morita, Hidehiro Fujiwara, Hiroki Noguchi, Yusuke Iguchi, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto. Area Comparison between 6T and 8T SRAM Cells in Dual-	IEICE Transactions 2007, Volume 90	(0)	2007
	Yasuhiro Morita, Hidehiro Fujiwara, Hiroki Noguchi, Yusuke Iguchi, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto. Area Optimization in 6T and 8T SRAM Cells Considering	IEICE Transactions 2007, Volume 90	(0)	2007
	Hidehiro Fujiwara, Koji Nii, Junichi Miyakoshi, Yuichiro Murachi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yoshimoto. A two-port SRAM for real-time video processor saving 53% of bitline power with majority logic and data-bit reordering.	Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006 2006	(0)	2006
	Yasuhiro Morita, Hidehiro Fujiwara, Hiroki Noguchi, Kentaro Kawakami, Junichi Miyakoshi, Shinji Mikami, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto. A 0.3-V Operating,	IEICE Transactions 2006, Volume 89	(0)	2006
	Toshiyuki Miyamoto, Yasuhiro Morita, Sadatoshi Kumagai. Vertical Partitioning Method for Secret Sharing Distributed Database System.	IEICE Transactions 2006, Volume 89	(0)	2006
	Kentaro Kawakami, Miwako Kanamori, Yasuhiro Morita, Jun Takemura, Masayuki Miyama, Masahiko Yoshimoto. Power-Minimum Frequency/Voltage Cooperative Management Method for VLSI Processor in Leakage-Dominant Technology Era.	IEICE Transactions 2005, Volume 88	(0)	2005

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