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    First name: Roger D.
    Last name: Chamberlain
    DBLP: 12/2696
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    Conference paper
    Roger D. Chamberlain, Mike Chambers, Darren Greenwalt, Brett Steinbrueck, Todd Steinbrueck.
    Water in the Cloud: Remote Understanding of Water Chemistry: Poster Abstract.
    Proceedings of the Second International Conference on Internet-of-Things Design and Implementation, IoTDI 2017, Pittsburgh, PA, USA, April 18-21, 2017 2017 (0) 2017
    Conference paper
    Jonathan C. Beard, Peng Li, Roger D. Chamberlain.
    RaftLib: A C++ template library for high performance stream parallel processing.
    IJHPCA 2017, Volume 31 (0) 2017
    Conference paper
    Roger D. Chamberlain.
    Assessing user preferences in programming language design.
    Proceedings of the 2017 ACM SIGPLAN International Symposium on New Ideas, New Paradigms, and Reflections on Programming and Software, Onward! 2017, Vancouver, BC, Canada, October 23 - 27, 2017 2017 (0) 2017
    Conference paper
    Roger D. Chamberlain, Mike Chambers, Darren Greenwalt, Brett Steinbrueck, Todd Steinbrueck.
    Layered Security and Ease of Installation for Devices on the Internet of Things.
    First IEEE International Conference on Internet-of-Things Design and Implementation, IoTDI 2016, Berlin, Germany, April 4-8, 2016 2016 (0) 2016
    Conference paper
    John Meier, Christopher D. Gill, Roger D. Chamberlain.
    Combining Admission and Modulation Decisions for Wireless Embedded Systems.
    19th IEEE International Symposium on Real-Time Distributed Computing, ISORC 2016, York, United Kingdom, May 17-20, 2016 2016 (0) 2016
    Conference paper
    Jonathan C. Beard, Cooper Epstein, Roger D. Chamberlain.
    Automated Reliability Classification of Queueing Models for Streaming Computation.
    Proceedings of the 6th ACM/SPEC International Conference on Performance Engineering, Austin, TX, USA, January 31 - February 4, 2015 2015 (0) 2015
    Conference paper
    Jonathan C. Beard, Peng Li, Roger D. Chamberlain.
    RaftLib: a C++ template library for high performance stream parallel processing.
    Proceedings of the Sixth International Workshop on Programming Models and Applications for Multicores and Manycores, PMAM@PPoPP 2015, San Francisco, CA, USA, February 7-8, 2015 2015 (0) 2015
    Conference paper
    Joseph G. Wingbermuehle, Ron Cytron, Roger D. Chamberlain.
    Superoptimized Memory Subsystems for Streaming Applications.
    Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, USA, February 22-24, 2015 2015 (0) 2015
    Journal article
    Jonathan C. Beard, Roger D. Chamberlain.
    Run Time Approximation of Non-blocking Service Rates for Streaming Systems.
    CoRR 2015, Volume 0 (0) 2015
    Conference paper
    Jonathan C. Beard, Cooper Epstein, Roger D. Chamberlain.
    Online Automated Reliability Classification of Queueing Models for Streaming Processing Using Support Vector Machines.
    Euro-Par 2015: Parallel Processing - 21st International Conference on Parallel and Distributed Computing, Vienna, Austria, August 24-28, 2015, Proceedings 2015 (0) 2015
    Conference paper
    Jonathan C. Beard, Roger D. Chamberlain.
    Run Time Approximation of Non-blocking Service Rates for Streaming Systems.
    17th IEEE International Conference on High Performance Computing and Communications, HPCC 2015, 7th IEEE International Symposium on Cyberspace Safety and Security, CSS 2015, and 12th IEEE International Conference on Embedded Software and Systems, ICESS 20 2015 (0) 2015
    Conference paper
    Joseph G. Wingbermuehle, Ron Cytron, Roger D. Chamberlain.
    Superoptimizing Memory Subsystems for Multiple Objectives.
    Euro-Par 2015: Parallel Processing Workshops - Euro-Par 2015 International Workshops, Vienna, Austria, August 24-25, 2015, Revised Selected Papers 2015 (0) 2015
    Conference paper
    Michael J. Hall, Roger D. Chamberlain.
    Using M/G/l queueing models with vacations to analyze virtualized logic computations.
    33rd IEEE International Conference on Computer Design, ICCD 2015, New York City, NY, USA, October 18-21, 2015 2015 (0) 2015
    Conference paper
    Lin Ma, Kunal Agrawal, Roger D. Chamberlain.
    Theoretical analysis of classic algorithms on highly-threaded many-core GPUs.
    ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP '14, Orlando, FL, USA, February 15-19, 2014 2014 (0) 2014
    Conference paper
    Michael J. Hall, Roger D. Chamberlain.
    Performance modeling of virtualized custom logic computations.
    Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21 - 23, 2014 2014 (0) 2014
    Conference paper
    Joseph G. Wingbermuehle, Ron Cytron, Roger D. Chamberlain.
    Superoptimization of memory subsystems.
    SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems 2014, LCTES '14, Edinburgh, United Kingdom - June 12 - 13, 2014 2014 (0) 2014
    Conference paper
    Lin Ma, Kunal Agrawal, Roger D. Chamberlain.
    A memory access model for highly-threaded many-core architectures.
    Future Generation Comp. Syst. 2014, Volume 30 (0) 2014
    Conference paper
    Michael J. Hall, Roger D. Chamberlain.
    Performance modeling of virtualized custom logic computations.
    IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2014, Zurich, Switzerland, June 18-20, 2014 2014 (0) 2014
    Conference paper
    Lin Ma, Roger D. Chamberlain, Kunal Agrawal.
    Performance modeling for highly-threaded many-core GPUs.
    IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2014, Zurich, Switzerland, June 18-20, 2014 2014 (0) 2014
    Conference paper
    Jonathan C. Beard, Roger D. Chamberlain.
    Use of a Levy Distribution for Modeling Best Case Execution Time Variation.
    Computer Performance Engineering - 11th European Workshop, EPEW 2014, Florence, Italy, September 11-12, 2014. Proceedings 2014 (0) 2014
    Conference paper
    Lin Ma, Roger D. Chamberlain, Kunal Agrawal.
    Analysis of classic algorithms on GPUs.
    International Conference on High Performance Computing Simulation, HPCS 2014, Bologna, Italy, 21-25 July, 2014 2014 (0) 2014
    Journal article
    Joseph G. Wingbermuehle, Ron Cytron, Roger D. Chamberlain.
    Optimization of Application-Specific Memories.
    Computer Architecture Letters 2014, Volume 13 (0) 2014
    Conference paper
    Peng Li, Kunal Agrawal, Jeremy Buhler, Roger D. Chamberlain.
    Orchestrating safe streaming computations with precise control.
    20th IEEE International Conference on Parallel and Distributed Systems, ICPADS 2014, Hsinchu, Taiwan, December 16-19, 2014 2014 (0) 2014
    Conference paper
    Shobana Padmanabhan, Yixin Chen, Roger D. Chamberlain.
    Decomposition techniques for optimal design-space exploration of streaming applications.
    ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP '13, Shenzhen, China, February 23-27, 2013 2013 (0) 2013
    Conference paper
    Joseph G. Wingbermuehle, Ron Cytron, Roger D. Chamberlain.
    Compiling for power with ScalaPipe.
    Journal of Systems Architecture - Embedded Systems Design 2013, Volume 59 (0) 2013
    Conference paper
    Jonathan C. Beard, Roger D. Chamberlain.
    Use of simple analytic performance models for streaming data applications deployed on diverse architectures.
    2012 IEEE International Symposium on Performance Analysis of Systems Software, Austin, TX, USA, 21-23 April, 2013 2013 (0) 2013
    Conference paper
    John Meier, Benjamin Karaus, Sreeharsha Sistla, Terry Tidwell, Roger D. Chamberlain, Christopher D. Gill.
    Assessing the appropriateness of using markov decision processes for RF spectrum management.
    16th ACM International Conference on Modeling, Analysis and Simulation of Wireless and Mobile Systems, MSWiM '13, Barcelona, Spain, November 3-8, 2013 2013 (0) 2013
    Conference paper
    Jonathan C. Beard, Roger D. Chamberlain.
    Analysis of a Simple Approach to Modeling Performance for Streaming Data Applications.
    2013 IEEE 21st International Symposium on Modelling, Analysis and Simulation of Computer and Telecommunication Systems, San Francisco, CA, USA, August 14-16, 2013 2013 (0) 2013
    Conference paper
    Peng Li, Kunal Agrawal, Jeremy Buhler, Roger D. Chamberlain.
    Adding data parallelism to streaming pipelines for throughput optimization.
    20th Annual International Conference on High Performance Computing, HiPC 2013, Bengaluru (Bangalore), Karnataka, India, December 18-21, 2013 2013 (0) 2013
    Conference paper
    Jeremy Buhler, Kunal Agrawal, Peng Li, Roger D. Chamberlain.
    Efficient deadlock avoidance for streaming computation with filtering.
    Proceedings of the 17th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2012, New Orleans, LA, USA, February 25-29, 2012 2012 (0) 2012
    Conference paper
    Joseph G. Wingbermuehle, Roger D. Chamberlain, Ron Cytron.
    ScalaPipe: A Streaming Application Generator.
    2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2012, 29 April - 1 May 2012, Toronto, Ontario, Canada 2012 (0) 2012
    Conference paper
    Lin Ma, Roger D. Chamberlain.
    A Performance Model for Memory Bandwidth Constrained Applications on Graphics Engines.
    23rd IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2012, Delft, The Netherlands, July 9-11, 2012 2012 (0) 2012
    Conference paper
    Lin Ma, Kunal Agrawal, Roger D. Chamberlain.
    A Memory Access Model for Highly-threaded Many-core Architectures.
    18th IEEE International Conference on Parallel and Distributed Systems, ICPADS 2012, Singapore, December 17-19, 2012 2012 (0) 2012
    Conference paper
    Shobana Padmanabhan, Yixin Chen, Roger D. Chamberlain.
    Convexity in Non-convex Optimizations of Streaming Applications.
    18th IEEE International Conference on Parallel and Distributed Systems, ICPADS 2012, Singapore, December 17-19, 2012 2012 (0) 2012
    Conference paper
    Michael J. Hall, Viktor Gruev, Roger D. Chamberlain.
    Noise analysis of a current-mode read circuit for sensing magnetic tunnel junction resistance.
    International Symposium on Circuits and Systems (ISCAS 2011), May 15-19 2011, Rio de Janeiro, Brazil 2011 (0) 2011
    Conference paper
    Joseph M. Lancaster, E. F. Berkley Shands, Jeremy Buhler, Roger D. Chamberlain.
    TimeTrial: A low-impact performance profiler for streaming data applications.
    22nd IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2011, Santa Monica, CA, USA, Sept. 11-14, 2011 2011 (0) 2011
    Conference paper
    Shobana Padmanabhan, Yixin Chen, Roger D. Chamberlain.
    Optimal design-space exploration of streaming applications.
    22nd IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2011, Santa Monica, CA, USA, Sept. 11-14, 2011 2011 (0) 2011
    Conference paper
    Lin Ma, Roger D. Chamberlain, Jeremy Buhler, Mark A. Franklin.
    Bloom Filter Performance on Graphics Engines.
    International Conference on Parallel Processing, ICPP 2011, Taipei, Taiwan, September 13-16, 2011 2011 (0) 2011
    Conference paper
    Joseph M. Lancaster, Joseph G. Wingbermuehle, Roger D. Chamberlain.
    Asking for Performance: Exploiting Developer Intuition to Guide Instrumentation with TimeTrial.
    13th IEEE International Conference on High Performance Computing Communication, HPCC 2011, Banff, Alberta, Canada, September 2-4, 2011 2011 (0) 2011
    Conference paper
    John Meier, Christopher Gill, Roger D. Chamberlain.
    Towards More Effective Spectrum Use Based on Memory Allocation Models.
    Proceedings of the 35th Annual IEEE International Computer Software and Applications Conference, COMPSAC 2011, Munich, Germany, 18-22 July 2011 2011 (0) 2011
    Conference paper
    Joseph M. Lancaster, Joseph G. Wingbermuehle, Jonathan C. Beard, Roger D. Chamberlain.
    Crossing Boundaries in TimeTrial: Monitoring Communications across Architecturally Diverse Computing Platforms.
    IEEE/IFIP 9th International Conference on Embedded and Ubiquitous Computing, EUC 2011, Melbourne, Australia, October 24-26, 2011 2011 (0) 2011
    Conference paper
    Peng Li, Kunal Agrawal, Jeremy Buhler, Roger D. Chamberlain.
    Deadlock avoidance for streaming computations with filtering.
    SPAA 2010: Proceedings of the 22nd Annual ACM Symposium on Parallelism in Algorithms and Architectures, Thira, Santorini, Greece, June 13-15, 2010 2010 (0) 2010
    Conference paper
    Arpith C. Jacob, Jeremy Buhler, Roger D. Chamberlain.
    Design of throughput-optimized arrays from recurrence abstractions.
    21st IEEE International Conference on Application-specific Systems Architectures and Processors, ASAP 2010, Rennes, France, 7-9 July 2010 2010 (0) 2010
    Conference paper
    Peng Li, Kunal Agrawal, Jeremy Buhler, Roger D. Chamberlain, Joseph M. Lancaster.
    Deadlock-avoidance for streaming applications with split-join structure: Two case studies.
    21st IEEE International Conference on Application-specific Systems Architectures and Processors, ASAP 2010, Rennes, France, 7-9 July 2010 2010 (0) 2010
    Conference paper
    Narayan Ganesan, Roger D. Chamberlain, Jeremy Buhler, Michela Taufer.
    Accelerating HMMER on GPUs by implementing hybrid data and task parallelism.
    Proceedings of the First ACM International Conference on Bioinformatics and Computational Biology, BCB 2010, Niagara Falls, NY, USA, August 2-4, 2010 2010 (0) 2010
    Conference paper
    Arpith C. Jacob, Jeremy Buhler, Roger D. Chamberlain.
    Rapid RNA Folding: Analysis and Acceleration of the Zuker Recurrence.
    18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2010, Charlotte, North Carolina, USA, 2-4 May 2010 2010 (0) 2010
    Conference paper
    Arpith C. Jacob, Jeremy Buhler, Roger D. Chamberlain.
    Design space exploration of throughput-optimized arrays from recurrence abstractions (abstract only).
    Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, FPGA 2010, Monterey, California, USA, February 21-23, 2010 2010 (0) 2010
    Journal article
    Roger D. Chamberlain, Mark A. Franklin, Eric J. Tyson, James H. Buckley, Jeremy Buhler, Greg Galloway, Saurabh Gayen, Michael Hall, E. F. Berkley Shands, Naveen Singla.
    Auto-Pipe: Streaming Applications on Architecturally Diverse Systems.
    IEEE Computer 2010, Volume 43 (0) 2010
    Conference paper
    Roger D. Chamberlain, Jeremy Buhler, Mark A. Franklin, James H. Buckley.
    Application-guided tool development for architecturally diverse computation.
    Proceedings of the 2010 ACM Symposium on Applied Computing (SAC), Sierre, Switzerland, March 22-26, 2010 2010 (0) 2010
    Conference paper
    Arpith C. Jacob, Jereny D. Buhler, Roger D. Chamberlain.
    Optimal runtime reconfiguration strategies for systolic arrays.
    19th International Conference on Field Programmable Logic and Applications, FPL 2009, August 31 - September 2, 2009, Prague, Czech Republic 2009 (0) 2009
    Conference paper
    Joseph M. Lancaster, Jeremy Buhler, Roger D. Chamberlain.
    Efficient runtime performance monitoring of FPGA-based applications.
    Annual IEEE International SoC Conference, SoCC 2009, September 9-11, 2009, Belfast, Northern Ireland, UK, Proceedings 2009 (0) 2009
    Conference paper
    Octav Chipara, Christopher Brooks, Sangeeta Bhattacharya, Chenyang Lu, Roger D. Chamberlain, Gruia-Catalin Roman, Thomas C. Bailey.
    Reliable Real-time Clinical Monitoring Using Sensor Network Technology.
    AMIA 2009, American Medical Informatics Association Annual Symposium, San Francisco, CA, USA, November 14-18, 2009 2009 (0) 2009
    Conference paper
    Roger D. Chamberlain, Narayan Ganesan.
    Sorting on architecturally diverse computer systems.
    Proceedings of the Third International Workshop on High-Performance Reconfigurable Computing Technology and Applications, HPRTCA 2009, November 15, 2009, Portland, Oregon, USA 2009 (0) 2009
    Conference paper
    Joseph M. Lancaster, Jeremy Buhler, Roger D. Chamberlain.
    Acceleration of ungapped extension in Mercury BLAST.
    Microprocessors and Microsystems - Embedded Hardware Design 2009, Volume 33 (0) 2009
    Conference paper
    Octav Chipara, Christopher Brooks, Sangeeta Bhattacharya, Chenyang Lu, Roger D. Chamberlain, Gruia-Catalin Roman, Thomas C. Bailey.
    Poster abstract: Reliable data collection from mobile users for real-time clinical monitoring.
    Proceedings of the 8th International Conference on Information Processing in Sensor Networks, IPSN 2009, April 13-16, 2009, San Francisco, California, USA 2009 (0) 2009
    Conference paper
    Arpith C. Jacob, Jeremy Buhler, Roger D. Chamberlain.
    Accelerating Nussinov RNA secondary structure prediction with systolic arrays on FPGAs.
    19th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2008, July 2-4, 2008, Leuven, Belgium 2008 (0) 2008
    Conference paper
    Joseph M. Lancaster, Ron Cytron, Roger D. Chamberlain.
    Understanding the performance of streaming applications deployed on hybrid systems.
    22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008 2008 (0) 2008
    Conference paper
    Praveen Krishnamurthy, Roger D. Chamberlain.
    Analytic performance models for bounded queueing systems.
    22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008 2008 (0) 2008
    Conference paper
    Roger D. Chamberlain, Joseph M. Lancaster, Ron Cytron.
    Visions for application development on hybrid computing systems.
    Parallel Computing 2008, Volume 34 (0) 2008
    Conference paper
    Roger D. Chamberlain, Joseph M. Lancaster, Ron Cytron.
    Visions for application development on hybrid computing systems.
    Parallel Computing 2008, Volume 34 (0) 2008
    Conference paper
    Arpith C. Jacob, Joseph M. Lancaster, Jeremy Buhler, Brandon Harris, Roger D. Chamberlain.
    Mercury BLASTP: Accelerating Protein Sequence Alignment.
    TRETS 2008, Volume 1 (0) 2008
    Conference paper
    Arpith C. Jacob, Joseph M. Lancaster, Jeremy Buhler, Roger D. Chamberlain.
    FPGA-accelerated seed generation in Mercury BLASTP.
    IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2007, 23-25 April 2007, Napa, California, USA 2007 (0) 2007
    Conference paper
    Brandon Harris, Arpith C. Jacob, Joseph M. Lancaster, Jeremy Buhler, Roger D. Chamberlain.
    A Banded Smith-Waterman FPGA Accelerator for Mercury BLASTP.
    FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007 2007 (0) 2007
    Conference paper
    Arpith C. Jacob, Joseph M. Lancaster, Jeremy Buhler, Roger D. Chamberlain.
    Preliminary results in accelerating profile HMM search on FPGAs.
    21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA 2007 (0) 2007
    Conference paper
    Saurabh Gayen, Eric J. Tyson, Mark A. Franklin, Roger D. Chamberlain.
    A Federated Simulation Environment for Hybrid Systems.
    21st International Workshop on Principles of Advanced and Distributed Simulation, PADS'07, San Diego, California, USA, June 12-15, 2007 2007 (0) 2007
    Conference paper
    Roger D. Chamberlain, Mark A. Franklin, Eric J. Tyson, Jeremy Buhler, Saurabh Gayen, Patrick Crowley, James H. Buckley.
    Application development on hybrid systems.
    Proceedings of the ACM/IEEE Conference on High Performance Networking and Computing, SC 2007, November 10-16, 2007, Reno, Nevada, USA 2007 (0) 2007
    Conference paper
    Richard Hough, Praveen Krishnamurthy, Roger D. Chamberlain, Ron Cytron, John W. Lockwood, Jason E. Fritts.
    Empirical performance assessment using soft-core processors on reconfigurable hardware.
    Proceedings of the Workshop on Experimental Computer Science, Part of ACM FCRC, San Diego, 13-14 June 2007 2007 (0) 2007
    Conference paper
    Praveen Krishnamurthy, Jeremy Buhler, Roger D. Chamberlain, Mark A. Franklin, Kwame Gyang, Arpith C. Jacob, Joseph M. Lancaster.
    Biosequence Similarity Search on the
    VLSI Signal Processing 2007, Volume 49 (0) 2007
    Conference paper
    Arpith C. Jacob, Brandon Harris, Jeremy Buhler, Roger D. Chamberlain, Young H. Cho.
    Scalable Softcore Vector Processor for Biosequence Applications.
    14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 24-26 April 2006, Napa, CA, USA, Proceedings 2006 (0) 2006
    Conference paper
    Rahul P. Maddimsetty, Jeremy Buhler, Roger D. Chamberlain, Mark A. Franklin, Brandon Harris.
    Accelerator design for protein sequence HMM search.
    Proceedings of the 20th Annual International Conference on Supercomputing, ICS 2006, Cairns, Queensland, Australia, June 28 - July 01, 2006 2006 (0) 2006
    Conference paper
    Shobana Padmanabhan, Ron Cytron, Roger D. Chamberlain, John W. Lockwood.
    Automatic application-specific microarchitecture reconfiguration.
    20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece 2006 (0) 2006
    Conference paper
    Roger D. Chamberlain, Ron Cytron, Jason E. Fritts, John W. Lockwood.
    Vision for liquid architecture.
    20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece 2006 (0) 2006
    Conference paper
    Gary Stiehr, Roger D. Chamberlain.
    Improving cluster utilization through intelligent processor sharing.
    20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece 2006 (0) 2006
    Journal article
    Scott J. Friedman, Praveen Krishnamurthy, Roger D. Chamberlain, Ron Cytron, Jason E. Fritts.
    Dusty caches for reference counting garbage collection.
    SIGARCH Computer Architecture News 2006, Volume 34 (0) 2006
    Conference paper
    Roger D. Chamberlain, John W. Lockwood, Saurabh Gayen, Richard Hough, Phillip H. Jones.
    Use of a Soft-Core Processor in a Hardware/Software Codesign Laboratory.
    2005 International Conference on Microelectronics Systems Education, MSE 2005, Anaheim, CA, USA, June 12-13, 2005 2005 (0) 2005
    Conference paper
    Shobana Padmanabhan, Phillip H. Jones, David V. Schuehler, Scott J. Friedman, Praveen Krishnamurthy, Huakai Zhang, Roger D. Chamberlain, Ron Cytron, Jason E. Fritts, John W. Lockwood.
    Extracting and Improving Microarchitecture Performance on Reconfigurable Architectures.
    International Journal of Parallel Programming 2005, Volume 33 (0) 2005
    Conference paper
    Roger D. Chamberlain, Mark A. Franklin, Praveen Krishnamurthy, Abhijit Mahajan.
    VLSI Photonic Ring Multicomputer Interconnect: Architecture and Signal Processing Performance.
    VLSI Signal Processing 2005, Volume 40 (0) 2005
    Conference paper
    Praveen Krishnamurthy, Jeremy Buhler, Roger D. Chamberlain, Mark A. Franklin, Kwame Gyang, Joseph M. Lancaster.
    Biosequence Similarity Search on the Mercury System.
    15th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2004), 27-29 September 2004, Galveston, TX, USA 2004 (0) 2004
    Conference paper
    Qiong Zhang, Roger D. Chamberlain, Ronald S. Indeck, Benjamin M. West, Jason White.
    Massively Parallel Data Mining Using Reconfigurable Hardware: Approximate String Matching.
    18th International Parallel and Distributed Processing Symposium (IPDPS 2004), CD-ROM / Abstracts Proceedings, 26-30 April 2004, Santa Fe, New Mexico, USA 2004 (0) 2004
    Conference paper
    Mark A. Franklin, Roger D. Chamberlain, Michael Henrichs, E. F. Berkley Shands, Jason White.
    An Architecture for Fast Processing of Large Unstructured Data Sets.
    22nd IEEE International Conference on Computer Design: VLSI in Computers Processors (ICCD 2004), 11-13 October 2004, San Jose, CA, USA, Proceedings 2004 (0) 2004
    Conference paper
    Roger D. Chamberlain, Eric Hemmeter, Robert Morley, Jason White.
    Modeling the Power Consumption of Audio Signal Processing Computations Using Customized Numerical Representations.
    Proceedings 36th Annual Simulation Symposium (ANSS-36 2003), Orlando, Florida, March 30 - April 2, 2003 2003 (0) 2003
    Conference paper
    Praveen Krishnamurthy, Mark A. Franklin, Roger D. Chamberlain.
    Dynamic Reconfiguration of an Optical Interconnect.
    Proceedings 36th Annual Simulation Symposium (ANSS-36 2003), Orlando, Florida, March 30 - April 2, 2003 2003 (0) 2003
    Conference paper
    Roger D. Chamberlain, Ch'ng Shi Baw, Mark A. Franklin, Christopher Hackmann, Praveen Krishnamurthy, Abhijit Mahajan, Michael Wrighton.
    Evaluating the Performance of Photonic Interconnection Networks.
    Proceedings 35th Annual Simulation Symposium (ANSS-35 2002), San Diego, California, USA, 14-18 April 2002 2002 (0) 2002
    Conference paper
    Jason E. Fritts, Roger D. Chamberlain.
    Breaking the Memory Bottleneck with an Optical Data Path.
    Proceedings 35th Annual Simulation Symposium (ANSS-35 2002), San Diego, California, USA, 14-18 April 2002 2002 (0) 2002
    Conference paper
    Roger D. Chamberlain, Mark A. Franklin, Praveen Krishnamurthy.
    Optical Network Reconfiguration for Signal Processing Applications.
    13th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2002), 17-19 July 2002, San Jose, CA, USA 2002 (0) 2002
    Conference paper
    Michael D. DeVore, Roger D. Chamberlain, George Engel, Joseph A. O'Sullivan, Mark A. Franklin.
    Tradeoffs Between Quality of Results and Resource Consumption in a Recognition System.
    13th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2002), 17-19 July 2002, San Jose, CA, USA 2002 (0) 2002
    Conference paper
    Roger D. Chamberlain, Mark A. Franklin, Ch'ng Shi Baw.
    Gemini: An Optical Interconnection Network for Parallel Processing.
    IEEE Trans. Parallel Distrib. Syst. 2002, Volume 13 (0) 2002
    Conference paper
    Roger D. Chamberlain, Mark A. Franklin, Abhijit Mahajan.
    VLSI Photonic Ring Interconnect for Embedded Multicomputers: Architecture and Performance.
    Proceedings of the ISCA 14th International Conference on Parallel and Distributed Computing Systems, August 8-10, 2001, Richardson, Texas, USA 2001 (0) 2001
    Conference paper
    Bradley L. Noble, J. Cris Wade, Roger D. Chamberlain.
    Performance Predictions for Speculative, Synchronous, VLSI Logic Simulation.
    Proceedings 34th Annual Simulation Symposium (SS 2001), Seattle, WA, USA, 22-26 April 2001 2001 (0) 2001
    Conference paper
    Bradley L. Noble, Roger D. Chamberlain.
    Analytic performance model for speculative, synchronous, discrete-event simulation.
    PADS 2000 (0) 2000
    Conference paper
    Bradley L. Noble, Roger D. Chamberlain.
    Performance Model for Speculative Simulation using Predictive Optimism.
    HICSS 1999 (0) 1999
    Conference paper
    Ch'ng Shi Baw, Roger D. Chamberlain, Mark A. Franklin.
    Fair Scheduling in an Optical Interconnection Network.
    MASCOTS 1999, Proceedings of the 7th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, 24-28 October, 1999, College Park, Maryland, USA 1999 (0) 1999
    Conference paper
    Gregory D. Peterson, Roger D. Chamberlain.
    Parallel application performance in a shared resource environment.
    Distributed Systems Engineering 1996, Volume 3 (0) 1996
    Conference paper
    Bradley L. Noble, Roger D. Chamberlain.
    Predicting the future: resource requirements and predictive optimism.
    Proceedings of the Ninth Workshop on Parallel and Distributed Simulation, PADS'95, Lake Placid, New York, USA, June 14-16, 1995 1995 (0) 1995
    Conference paper
    Roger D. Chamberlain, Robert R. Krchnavek.
    Optically interconnected multicomputers using inverted-graph topologies.
    IEEE Micro 1995, Volume 15 (0) 1995
    Conference paper
    Roger D. Chamberlain.
    Parallel Logic Simulation of VLSI Systems.
    DAC 1995 (0) 1995
    Conference paper
    Roger D. Chamberlain, Gregory D. Peterson, Mark A. Franklin, Michael A. Province.
    Genetic epidemiology, parallel algorithms, and workstation networks.
    HICSS (5) 1995 (0) 1995
    Conference paper
    Bradley L. Noble, Gregory D. Peterson, Roger D. Chamberlain.
    Performance of synchronous parallel discrete-event simulation.
    HICSS (2) 1995 (0) 1995
    Conference paper
    Gregory D. Peterson, Roger D. Chamberlain.
    Stealing cycles: Can we get along?
    HICSS (2) 1995 (0) 1995
    Conference paper
    George Varghese, Roger D. Chamberlain, William E. Weihl.
    Deriving Global Virtual Time Algorithms from Conservative Simulation Protocols.
    Inf. Process. Lett. 1995, Volume 54 (0) 1995
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