Publications :: Search

Show author

On this page you see the details of the selected author.

Author information
First name:	Ramon
Last name:	Canal
DBLP:	21/4866
Rating:	(not rated yet)
Bookmark:

Below you find the publications which have been written by this author.

Show item 1 to 15 of 15  

Select a publication
Show	Title	Venue	Rating	Date
	Matteo Monchiero, Ramon Canal, Antonio González. Using Coherence Information and Decay Techniques to Optimize L2 Cache Leakage in CMPs.	ICPP 2009, International Conference on Parallel Processing, Vienna, Austria, 22-25 September 2009 2009	(0)	2009
	Enric Herrero, José González, Ramon Canal. Distributed cooperative caching.	17th International Conference on Parallel Architecture and Compilation Techniques (PACT 2008), Toronto, Ontario, Canada, October 25-29, 2008 2008	(0)	2008
	Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David Brooks. Replacing 6T SRAMs with 3T1D DRAMs in the L1 Data Cache to Combat Process Variability.	IEEE Micro 2008, Volume 28	(0)	2008
	Matteo Monchiero, Ramon Canal, Antonio González. Power/Performance/Thermal Design-Space Exploration for Multicore Architectures.	IEEE Trans. Parallel Distrib. Syst. 2008, Volume 19	(0)	2008
	Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David Brooks. Process Variation Tolerant 3T1D-Based Cache Architectures.	40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 1-5 December 2007, Chicago, Illinois, USA 2007	(0)	2007
	Matteo Monchiero, Ramon Canal, Antonio González. Design space exploration for multicore architectures: a power/performance/thermal view.	Proceedings of the 20th Annual International Conference on Supercomputing, ICS 2006, Cairns, Queensland, Australia, June 28 - July 01, 2006 2006	(0)	2006
	Ramon Canal, Antonio González, James E. Smith. Value Compression for Efficient Computation.	Euro-Par 2005, Parallel Processing, 11th International Euro-Par Conference, Lisbon, Portugal, August 30 - September 2, 2005, Proceedings 2005	(0)	2005
	Ramon Canal, Antonio González, James E. Smith. Software-Controlled Operand-Gating.	2nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2004), 20-24 March 2004, San Jose, CA, USA 2004	(0)	2004
	Jaume Abella, Ramon Canal, Antonio González. Power- and Complexity-Aware Issue Queue Designs.	IEEE Micro 2003, Volume 23	(0)	2003
	Ramon Canal, Antonio González. Reducing the complexity of the issue logic.	ICS 2001	(0)	2001
	Ramon Canal, Joan-Manuel Parcerisa, Antonio González. Dynamic Code Partitioning for Clustered Architectures.	International Journal of Parallel Programming 2001, Volume 29	(0)	2001
	Ramon Canal, Joan-Manuel Parcerisa, Antonio González. Dynamic Cluster Assignment Mechanisms.	HPCA 2000	(0)	2000
	Ramon Canal, Antonio González. A low-complexity issue logic.	ICS 2000	(0)	2000
	Ramon Canal, Antonio González, James E. Smith. Very low power pipelines using significance compression.	MICRO 2000	(0)	2000
	Ramon Canal, Joan-Manuel Parcerisa, Antonio González. A Cost-Effective Clustered Architecture.	IEEE PACT 1999	(0)	1999

Your query returned 15 matches in the database.