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    Author information
    First name: Nobuto
    Last name: Ono
    DBLP: 22/4170
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    Takaaki Okumura, Atsushi Kurokawa, Hiroo Masuda, Toshiki Kanamoto, Masanori Hashimoto, Hiroshi Takafuji, Hidenari Nakashima, Nobuto Ono, Tsuyoshi Sakata, Takashi Sato.
    Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations.
    IEICE Transactions 2009, Volume 92 (0) 2009
    Hiroyuki Kobayashi, Nobuto Ono, Takashi Sato, Jiro Iwai, Hidenari Nakashima, Takaaki Okumura, Masanori Hashimoto.
    Proposal of Metrics for SSTA Accuracy Evaluation.
    IEICE Transactions 2007, Volume 90 (0) 2007
    Takashi Nojima, Nobuto Ono, Shigetoshi Nakatake, Toru Fujimura, Koji Okazaki, Yoji Kajitani.
    Adaptive Porting of Analog IPs with Reusable Conservative Properties.
    2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2-3 March 2006, Karlsruhe, Germany 2006 (0) 2006
    Takashi Sato, Junji Ichimiya, Nobuto Ono, Masanori Hashimoto.
    On-Chip Thermal Gradient Analysis Considering Interdependence between Leakage Power and Temperature.
    IEICE Transactions 2006, Volume 89 (0) 2006
    Takashi Sato, Junji Ichimiya, Nobuto Ono, Koutaro Hachiya, Masanori Hashimoto.
    On-chip thermal gradient analysis and temperature flattening for SoC design.
    Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005 2005 (0) 2005
    Atsushi Kurokawa, Masaharu Yamamoto, Nobuto Ono, Tetsuro Kage, Yasuaki Inoue, Hiroo Masuda.
    Capacitance and Yield Evaluations Using a 90-nm Process Technology Based on the Dense Power-Ground Interconnect Architecture.
    6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA 2005 (0) 2005
    Takashi Sato, Junji Ichimiya, Nobuto Ono, Koutaro Hachiya, Masanori Hashimoto.
    On-Chip Thermal Gradient Analysis and Temperature Flattening for SoC Design.
    IEICE Transactions 2005, Volume 88 (0) 2005
    Atsushi Kurokawa, Nobuto Ono, Tetsuro Kage, Hiroo Masuda.
    DEPOGIT: dense power-ground interconnect architecture for physical design integrity.
    Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004 2004 (0) 2004

    Your query returned 8 matches in the database.