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First name:	Yan
Last name:	Lin
DBLP:	27/586
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Show	Title	Venue	Rating	Date
	Jinyu Tian, Yan Lin. Short-Term Electricity Price Forecasting Based on Rough Sets and Improved SVM.	Proceedings of the Second International Workshop on Knowledge Discovery and Data Mining, WKDD 2009, Moscow, Russia, 23-25 January 2009 2009	(0)	2009
	Jinyu Tian, Yan Lin. Research on the Electric Power Enterprise Performance Evaluation Based on Symbiosis Theory.	Proceedings of the Second International Workshop on Knowledge Discovery and Data Mining, WKDD 2009, Moscow, Russia, 23-25 January 2009 2009	(0)	2009
	Ren Zhang, Yan Lin. DEG 5.0, a database of essential genes in both prokaryotes and eukaryotes.	Nucleic Acids Research 2009, Volume 37	(0)	2009
	Lerong Cheng, Yan Lin, Lei He. Trace-based framework for concurrent development of process and FPGA architecture considering process variation and reliability.	Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008 2008	(0)	2008
	Yan Lin, George C. Tseng, Soo Yeon Cheong, Lora J. H. Bean, Stephanie L. Sherman, Eleanor Feingold. Smarter clustering methods for SNP genotype calling.	Bioinformatics 2008, Volume 24	(0)	2008
	Ren Zhang, Yan Lin, Chun-Ting Zhang. Greglist: a database listing potential G-quadruplex regulated genes.	Nucleic Acids Research 2008, Volume 36	(0)	2008
	Yu Hu, Yan Lin, Lei He, Tim Tuan. Physical synthesis for FPGA interconnect power reduction by dual-Vdd budgeting and retiming.	ACM Trans. Design Autom. Electr. Syst. 2008, Volume 13	(0)	2008
	Yan Lin, Lei He, Michael Hutton. Stochastic Physical Synthesis Considering Prerouting Interconnect Uncertainty and Process Variation for FPGAs.	IEEE Trans. VLSI Syst. 2008, Volume 16	(0)	2008
	Yan Lin, Lei He. Interactive presentation: Statistical dual-Vdd assignment for FPGA interconnect power reduction.	2007 Design, Automation and Test in Europe Conference and Exposition (DATE 2007), April 16-20, 2007, Nice, France 2007	(0)	2007
	Yan Lin, Lei He. Stochastic physical synthesis for FPGAs with pre-routing interconnect uncertainty and process variation.	Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, FPGA 2007, Monterey, California, USA, February 18-20, 2007 2007	(0)	2007
	Yan Lin, Lei He. Device and architecture concurrent optimization for FPGA transient soft error rate.	2007 International Conference on Computer-Aided Design (ICCAD'07), November 5-8, 2007, San Jose, CA, USA 2007	(0)	2007
	Yan Lin, Liu Qing. A Logical Method of Formalization for Granular Computing.	2007 IEEE International Conference on Granular Computing, GrC 2007, San Jose, California, USA, 2-4 November 2007 2007	(0)	2007
	Lerong Cheng, Fei Li, Yan Lin, Phoebe Wong, Lei He. Device and Architecture Cooptimization for FPGA Power Reduction.	IEEE Trans. on CAD of Integrated Circuits and Systems 2007, Volume 26	(0)	2007
	Fei Li, Yan Lin, Lei He. Field Programmability of Supply Voltages for FPGA Power Reduction.	IEEE Trans. on CAD of Integrated Circuits and Systems 2007, Volume 26	(0)	2007
	Yu Hu, Yan Lin, Lei He, Tim Tuan. Simultaneous time slack budgeting and retiming for dual-Vdd FPGA power reduction.	Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006 2006	(0)	2006
	Michael Hutton, Yan Lin, Lei He. Placement and Timing for FPGAs Considering Variations.	Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006 2006	(0)	2006
	Yan Lin, Yu Hu, Lei He, Vijay Raghunat. An efficient chip-level time slack allocation algorithm for Dual-Vdd FPGA power reduction.	Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006 2006	(0)	2006
	Yan Lin, Lei He. Dual-Vdd Interconnect With Chip-Level Time Slack Allocation for FPGA Power Reduction.	IEEE Trans. on CAD of Integrated Circuits and Systems 2006, Volume 25	(0)	2006
	Qiang Li, Yan Lin, Kun Liu, Jiubin Ju. Constructing Correlations in Attack Connection Chains Using Active Perturbation.	Algorithmic Applications in Management, First International Conference, AAIM 2005, Xian, China, June 22-25, 2005, Proceedings 2005	(0)	2005
	Yan Lin, Fei Li, Lei He. Routing track duplication with fine-grained power-gating for FPGA interconnect power reduction.	Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005 2005	(0)	2005
	Lerong Cheng, Phoebe Wong, Fei Li, Yan Lin, Lei He. Device and architecture co-optimization for FPGA power reduction.	Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005 2005	(0)	2005
	Yan Lin, Lei He. Leakage efficient chip-level dual-Vdd assignment with time slack allocation for FPGA power reduction.	Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005 2005	(0)	2005
	Yan Lin, Fei Li, Lei He. Power modeling and architecture evaluation for FPGA with novel circuits for Vdd programmability.	Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, FPGA 2005, Monterey, California, USA, February 20-22, 2005 2005	(0)	2005
	Ho-Yan Wong, Lerong Cheng, Yan Lin, Lei He. FPGA device and architecture evaluation considering process variations.	2005 International Conference on Computer-Aided Design (ICCAD'05), November 6-10, 2005, San Jose, CA, USA 2005	(0)	2005
	Yan Lin, Fei Li, Lei He. Circuits and architectures for field programmable gate array with configurable supply voltage.	IEEE Trans. VLSI Syst. 2005, Volume 13	(0)	2005
	Fei Li, Yan Lin, Lei He. FPGA power reduction using configurable dual-Vdd.	Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004 2004	(0)	2004
	Fei Li, Yan Lin, Lei He, Jason Cong. Low-power FPGA using pre-defined dual-Vdd/dual-Vt fabrics.	Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, FPGA 2004, Monterey, California, USA, February 22-24, 2004 2004	(0)	2004
	Fei Li, Yan Lin, Lei He. Vdd programmability to reduce FPGA interconnect power.	2004 International Conference on Computer-Aided Design (ICCAD'04), November 7-11, 2004, San Jose, CA, USA 2004	(0)	2004
	Xiangui Kang, Jiwu Huang, Yun Q. Shi, Yan Lin. A DWT-DFT composite watermarking scheme robust to both affine transform and JPEG compression.	IEEE Trans. Circuits Syst. Video Techn. 2003, Volume 13	(0)	2003
	Anna Scaglione, Yan Lin, Georgios B. Giannakis. Block redundant constant modulus algorithm for channel-irrespective blind identifiability.	Proceedings of the IEEE-EURASIP Workshop on Nonlinear Signal and Image Processing (NSIP'99), Antalya, Turkey, June 20-23, 1999 1999	(0)	1999
	Yan Lin, Marek J. Druzdzel. Relevance-Based Incremental Belief Updating in Bayesian Networks.	IJPRAI 1999, Volume 13	(0)	1999
	Yan Lin, Marek J. Druzdzel. Relevance-Based Sequential Evidence Processing in Bayesian Networks.	Proceedings of the Eleventh International Florida Artificial Intelligence Research Society Conference, May 18-20, 1998, Sanibel Island, Florida, USA 1998	(0)	1998
	Yan Lin, Marek J. Druzdzel. Computational Advantages of Relevance Reasoning in Bayesian Belief Networks.	UAI '97: Proceedings of the Thirteenth Conference on Uncertainty in Artificial Intelligence, August 1-3, 1997, Brown University, Providence, Rhode Island, USA 1997	(0)	1997

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