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First name:	Rajesh
Last name:	Radhakrishnan
DBLP:	54/631
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	Guy Cochrane, Ruth Akhtar, James K. Bonfield, Lawrence Bower, Fehmi Demiralp, Nadeem Faruque, Richard Gibson, Gemma Hoad, Tim J. P. Hubbard, Christopher Hunter, Mikyung Jang, Szilveszter Juhos, Rasko Leinonen, Steven Leonard, Quan Lin, Rodrigo Lopez, Dariusz Lorenc, Hamish McWilliam, Gaurab Mukherjee, Sheila Plaister, Rajesh Radhakrishnan, Stephen Robinson, Siamak Sobhany, Petra Ten Hoopen, Robert Vaughan, Vadim Zalunin, Ewan Birney. Petabyte-scale innovations at the European Nucleotide Archive.	Nucleic Acids Research 2009, Volume 37	(0)	2009
	Manish Handa, Rajesh Radhakrishnan, Madhubanti Mukherjee, Ranga Vemuri. A Fast Macro Based Compilation Methodology for Partially Reconfigurable FPGA Designs.	16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India 2003	(0)	2003
	Srinivasan Dasasathyan, Rajesh Radhakrishnan, Ranga Vemuri. Framework for Synthesis of Virtual Pipelines.	Proceedings of the ASPDAC 2002 / VLSI Design 2002, CD-ROM, 7-11 January 2002, Bangalore, India 2002	(0)	2002
	Rajesh Radhakrishnan, Elena Teica, Ranga Vemuri. Verification of Basic Block Schedules Using RTL Transformations.	Correct Hardware Design and Verification Methods, 11th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2001, Livingston, Scotland, UK, September 4-7, 2001, Proceedings 2001	(0)	2001
	Elena Teica, Rajesh Radhakrishnan, Ranga Vemuri. On the verification of synthesized designs using automatically generated transformational witnesses.	DATE 2001	(0)	2001
	Naren Narasimhan, Elena Teica, Rajesh Radhakrishnan, Sriram Govindarajan, Ranga Vemuri. Theorem Proving Guided Development of Formal Assertions in a Resource-Constrained Scheduler for High-Level Synthesis.	Formal Methods in System Design 2001, Volume 19	(0)	2001

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