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Title |
Venue |
Rating |
Date |
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Fernando Gehm Moraes, Aline Mello, Leandro Möller, Luciano Ost, Ney Laert Vilar Calazans.
A Low Area Overhead Packet-switched Network on Chip: Architecture and Prototyping.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
 (0)
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2003 |
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Adam Golda, Andrzej Kos.
Static Versus Dynamic Power Losses in CMOS VLSI Systems Considering Temperature.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Ali Ahmadinia, Jürgen Teich.
Speeding up Online Placement for XILINX FPGAs by Reducing Configuration Overhead.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Andreas Hermann, Markus Olbrich, Erich Barke.
Substrate Modeling and Noise Reduction in Mixed-Signal Circuits.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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André Luiz Aita, João Baptista dos Santos Martins, César Augusto Prior, Cesar Ramos Rodrigues.
Low-Power High-CMRR CMOS Instrumentation Amplifier for Biomedical Applications.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Stephan Henzler, Markus Koban, Doris Schmitt-Landsiedel, Jörg Berthold, Georg Georgakos.
Design Aspects and Technological Scaling Limits of ZigZag Circuit Block Switch-Off Schemes.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Chia-Ming Hsu, Tien-Fu Chen.
Flexible Heterogeneous Multicore Architectures for Media Processing via Customized Long Instruction Words.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Alexandre M. Amory, Leandro A. Oliveira, Fernando Gehm Moraes.
Software-Based Test for Non-Programmable Cores in Bus-Based System-on-Chip Architectures.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Thomas Hollstein, Ralf Ludewig, Christoph Mager, Peter Zipf, Manfred Glesner.
A hierarchical generic approach for on-chip communication, testing and debugging of SoCs.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Anneliese Amschler Andrews, Andrew O'Fallon, Tom Chen.
A Rule-Based Software Testing Method for VHDL Models.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi.
A Genetic Approach To Bus Encoding.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Ehsan Atoofian, Zainalabedin Navabi.
A Low Power BIST Architecture for FPGA Look-Up Table Testing.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Antonio Carlos Schneider Beck, Luigi Carro.
Low Power Java Processor for Embedded Applications.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Tuomas Järvinen, Perttu Salmela, Teemu Sipilä, Jarmo Takala.
In-Place Storage of Path Metrics in Viterbi Decoders.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Jürgen Becker, Michael Hübner, Michael Ullmann.
Real-Time Dynamically Run-Time Reconfiguration for Power-/Cost-optimized Virtex FPGA Realizations.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Jürgen Becker, Alexander Thomas, Maik Scheer.
Datapath and Compiler Integration of Coarse-grain Reconfigurable XPP-Arrays into Pipelined RISC Processors.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Maciej Bellos, Xrysovalantis Kavousianos, Dimitris Nikolos, Dimitrios Kagaris.
DV-TSE: Difference Vector Based Test Set Embedding.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Stephan Bingemer, Peter Zipf, Manfred Glesner.
An Integrated Model Bridging the Gap between Technology and Economy.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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G. Bonfini, C. Garbossa, Roberto Saletti.
A Switched Opamp-based 10-b Integrated ADC for Ultra Low-power Applications.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Karim Ben Chehida, Michel Auguin.
Partitioning Reactive Data Flow Applications On Dynamically Reconfigurable Systems.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Nikolaos Kavvadias, Spiridon Nikolaidis.
Tradeoffs in the Design Space Exploration of Application-Specific Processors.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Shekhar Y. Borkar.
Exponential Challenges, Exponential Rewards - The future of Moore's Law.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Zahid Khan, Tughrul Arslan, Ahmet T. Erdogan.
Crosstalk Immune Coding from Area and Power Perspective for high performance AMBA based SoC systems.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Maciej Borkowski, Juha Häkkinen, Juha Kostamovaara.
A Sigma-Delta Modulator Development Environment for Fractional-N Frequency Synthesis.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Dominique Borrione, Menouer Boubekeur, Laurent Mounier, Marc Renaudin, Antoine Sirianni.
Validation of asynchronous circuit specifications using IF/CADP.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Marios Kesoulis, Dimitrios Soudris, C. Koukourlis, Adonios Thanailakis.
Designing Low Power Direct Digital Frequency Synthesizers.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Axel G. Braun, Jan B. Freuer, Joachim Gerlach, Wolfgang Rosenstiel.
Automated Conversion of SystemC Fixed-Point Data Types for Hardware Synthesis.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Andrea S. Brogna, Franco Bigongiari, Silvia Chiusano, Paolo Prinetto, Roberto Saletti.
Designing and Testing High Dependable Memories for Aerospace Applications.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Andreas Kirschbaum.
Towards safer cars - Microeletronics in Automotive.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Young-Su Kwon, Woo-Seung Yang, Chong-Min Kyung.
Signal Scheduling Driven Circuit Partitioning for Multiple FPGAs with Time-multiplexed Interconnection.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Juan Manuel García Chamizo, Maria Teresa Signes Pont, Higinio Mora Mora, Gregorio de Miguel Casado.
Hough Transform recursive evaluation using Distributed Arithmetic.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Juan Manuel García Chamizo, Jerónimo Mora Pascual, Higinio Mora Mora, Maria Teresa Signes Pont.
Calculation Methodology for Flexible Arithmetic Processing.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Casper Lageweg, Sorin Cotofana, Stamatis Vassiliadis.
Evaluation Methodology for Single Electron Encoded Threshold Logic Gates.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Cristiano Lazzari, Cristiano Viana Domingues, José Luís Almada Güntzel, Ricardo Augusto da Luz Reis.
A New Macro-cell Generation Strategy for three metal layer CMOS Technologies.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Cristian Chitu, Manfred Glesner.
High Performance of an AES-Rijndael ASIC working in OCB/ECB Modes of Operation.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Christophe Layer.
High Performance System Architecture of an Associative Computing Engine Optimised for Search Algorithms.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Valentina Ciriani, Anna Bernasconi, Rolf Drechsler.
Testability of SPP Three-Level Logic Networks.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Fernando da Rocha Paixão Cortes, Eric E. Fabris, Sergio Bampi.
Applying the GM/ID method in the analysis and design of Miller Amplifier, Comparator and GM-C PASS-B.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Eduardo A. C. da Costa, José C. Monteiro, Sergio Bampi.
Gray Encoded Arithmetic Operators Applied to FFT and FIR Dedicated Datapaths.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Philippe Coussy, Adel Baganne, Eric Martin.
Communication and Timing Constraints Analysis for IP Design and Integration.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Radu Dogaru, Cristian Chitu, Manfred Glesner.
A Versatile Cellular Neural Circuit Based on a Multi-nested Approach: Functional Capabilities and Applications.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Alan J. Drake, Kevin J. Nowka, Richard B. Brown.
Evaluation of Dynamic-Threshold Logic for Low-Power VLSI Design in 0.13um PD-SOI.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Nicole Drechsler, Rolf Drechsler.
Exploration of Sequential Depth by Evolutionary Algorithms.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Radu Marculescu.
Designing Application Specific Networks-On-Chip: Five easy pieces.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Martin Margala, Quentin Diduck, Eric Moule.
1.8V 0.18µm CMOS Novel Successive Approximation ADC.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Martin Margala, Magdy A. El-Moursy, Ali El-Moursy, Junmou Zhang, Wendi Rabiner Heinzelman.
1-V ADPCM Processor for Low-Power Wireless Applications.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Martin Margala, John Liobe, Quentin Diduck.
Deep-Submicron CMOS Design Methodology for High-Performance Low-Power Analog-to-Digital Converters.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Juha Häkkinen, Maciej Borkowski, Juha Kostamovaara.
A PLL-Based RF Synthesizer Test System.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Michael S. McCorquodale, Eric D. Marsman, Robert M. Senger, Fadi H. Gebara, Richard B. Brown.
Microsystem and SoC Design with UMIPS.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Renato Fernandes Hentschke, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis.
A study on the performance of fast initial placement algorithms.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Daniel Mesquita, Lionel Torres, Fernando Gehm Moraes, Gilles Sassatelli, Michel Robert.
Are coarse grain reconfigurable architectures suitable for cryptography?
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Johanna Tuominen, Pasi Liljeberg, Jouni Isoaho.
Self-Timed Approach for Reducing On-Chip Switching Noise.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Arkadiy Morgenshtein, Michael Moreinis, Israel A. Wagner, Avinoam Kolodny.
Logic Gates as Repeaters (LGR) for Timing Optimization of SoC Interconnects.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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José Augusto Miranda Nacif, Flávio Miana de Paula, Harry Foster, Claudionor José Nunes Coelho Jr., Antônio Otávio Fernandes.
The Chip is Ready. Am I done? On-chip Verification using Assertion Processors.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Klaus Winkelmann.
Formal Verification.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Glenn Wolfe, Mengmeng Ding, Ranga Vemuri.
Adaptive Sampling and Modeling of Analog Circuit Performance Parameters.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Jari Nikara, Stamatis Vassiliadis, Jarmo Takala, Petri Liuha.
FPGA-Based Variable Length Decoders.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Pavel V. Nikitin, Winnie Yam, C.-J. Richard Shi.
Parametric Equivalent Circuit Extraction for VLSI Structures.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Shrutin Ulman.
Delay and Short Circuit Power Estimation for a Submicron CMOS Inverter driving a CRC-PI Interconnect Load.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Timm Ostermann, Wolfgang Gut, Christian Bacher, Bernd Deutschmann.
Measures to Reduce the Electromagnetic Emission of a SoC.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Dinesh Pamunuwa, Johnny Öberg, Li-Rong Zheng, Mikael Millberg, Axel Jantsch.
Layout, Performance and Power Trade-Offs in Mesh-Based Network-on-Chip Architectures.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Arturo Méndez Patiño, Marcos Martínez Peiró.
2D-DCT Implementation on FPGA by Polynomial Transformation in Two-Dimensions.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Narayanan Vijaykrishnan.
Energy Efficient and Reliable System Design.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Mihail Petrov, Abdulfattah Mohammad Obeid, Tudor Murgan, Peter Zipf, Jörg Brakensiek, Bernard Ölkrug, Manfred Glesner.
An Adaptive Trace-Back Solution for State-Parallel Viterbi Decoders.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Thilo Pionteck, Lukusa D. Kabulepa, Manfred Glesner.
Exploring the Capabilities of Reconfigurable Hardware for OFDM-based WLANs.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Wei Zou, C. N. Chu, Sudhakar M. Reddy, Irith Pomeranz.
Optimizing SOC Test Resources using Dual Sequences.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Ilia Polian, Bernd Becker.
Reducing ATE Cost in System-on-Chip Test.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Tapio Ristimäki, Jari Nurmi.
Reprogrammable Algorithm Accelerator IP Block.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Elham Safi, Reihaneh Saberi, Zohreh Karimi, Zainalabedin Navabi.
Processor Testing Using an ADL Description and Genetic Algorithms.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Diego Caldas Salengue, João Baptista dos Santos Martins, Cesar Ramos Rodrigues, André Luiz Aita.
FPGA Implementation of a VVI Temporary Pacemaker Digital Control.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Hemanth Sampath, Ranga Vemuri.
MSL: A High-Level Language for Parameterized Analog and Mixed Signal Layout Generators.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Shervin Sharifi, Mohammad Hosseinabady, Zainalabedin Navabi.
Selective Trigger Scan Architecture for Reducing Power, Time and Data Volume in SoC Testing.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Werner Weber.
Ambient Intelligence - Key Technologies in the Communication Age.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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João M. S. Silva, Luis Miguel Silveira.
Dynamic Models for Substrate Coupling in Mixed-Mode Systems.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Nicolas Sklavos, Odysseas G. Koufopavlou.
Architectures and FPGA Implementations of the SCO(-1, -2, -3) Ciphers Family.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Adão Antônio de Souza Jr., Luigi Carro.
An All-Digital ADC for Instrumentation within SOCs.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
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Hans-Joachim Stolberg, Mladen Berekovic, Lars Friebe, Sören Moch, Mark Bernd Kulaczewski, Peter Pirsch.
HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
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2003 |
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Péter Szántó, Béla Fehér.
3D rendering using FPGAs.
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IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003 2003 |
(0)
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2003 |
db/conf/vlsi/vlsisoc2003.html